Angsuman Roy

APD and SiPM Chip #1 in 500 nm CMOS (2015)

This chip had an avalanche photodiode (APD) array with transimpedance amplifiers and a silicon photomultiplier (SiPM) structure.

Perimeter-Gated APDs in 500 nm CMOS (2016)

This chip adds perimeter gating to APDs to try to reduce their dark count rate.

Passive RC Sigma-Delta Modulator in 500 nm CMOS (2014)

This was my first chip design and contains an implementation of my passive 2nd order sigma delta topology.

TIA Test Chip in 500 nm CMOS (2015) 

I didn't design or layout the circuits in this chip but I did lay out the padframe and final routing. I learned a lot of lessons about package selection after the chip was fabricated.

Switched Capacitor Sigma-Delta Modulator and KD1S Modulator in 500 nm CMOS (2015)

I improved upon the design in my first chip by using switched-capacitors. I also implemented a KD1S modulator.

APD and SiPM Chip #2 in 500 nm CMOS (2015)

This chip contains alternate variations on APD and SiPM designs in chip #1